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In digital circuits , a shift register is a cascade of flip flops , sharing the same clock , in which the output of each flip-flop is connected to the 'data' input of the next flip-flop in the chain, resulting in a circuit that shifts by one position the ' bit array ' stored in it, 'shifting in' the data present at its input and 'shifting out' the last bit in the array, at each transition of the clock input.
More generally, a shift register may be multidimensional, such that its 'data in' and stage outputs are themselves bit arrays: Shift registers can have both parallel and serial inputs and outputs.
There are also types that have both serial and parallel input and types with serial and parallel output. There are also 'bidirectional' shift registers which allow shifting in both directions: The serial input and last output of a shift register can also be connected to create a 'circular shift register'. These are the simplest kind of shift registers. The data string is presented at 'Data In', and is shifted right one stage each time 'Data Advance' is brought high.
At each advance, the bit on the far left i. The bit on the far right i. Data Out is shifted out and lost. The data are stored after each flip-flop on the 'Q' output, so there are four storage 'slots' available in this arrangement, hence it is a 4-bit Register. To give an idea of the shifting pattern, imagine that the register holds so all storage slots are empty. As 'Data In' presents 1,0,1,1,0,0,0,0 in that order, with a pulse at 'Data Advance' each time—this is called clocking or strobing to the register, this is the result.
The right hand column corresponds to the right-most flip-flop's output pin, and so on. So the serial output of the entire register is It can be seen that if data were to be continued to input, it would get exactly what was put in , but offset by four 'Data Advance' cycles. This arrangement is the hardware equivalent of a queue. Also, at any time, the whole register can be set to zero by bringing the reset R pins high. This arrangement performs destructive readout - each datum is lost once it has been shifted out of the right-most bit.
This configuration allows conversion from serial to parallel format. Data input is serial, as described in the SISO section above.
Once the data has been clocked in, it may be either read off at each output simultaneously, or it can be shifted out. In this configuration, each flip-flop is edge triggered. All flip-flops operate at the given clock frequency.
Each input bit makes its way down to the Nth output after N clock cycles, leading to parallel output. In cases where the parallel outputs should not change during the serial loading process, it is desirable to use a latched or buffered output. In a latched shift register such as the the serial data is first loaded into an internal buffer register, then upon receipt of a load signal the state of the buffer register is copied into a set of output registers.
This configuration has the data input on lines D1 through D4 in parallel format, D1 being the most significant bit. However, as long as the number of clock cycles is not more than the length of the data-string, the Data Output, Q, will be the parallel data read off in order.
One of the most common uses of a shift register is to convert between serial and parallel interfaces. This is useful as many circuits work on groups of bits in parallel, but serial interfaces are simpler to construct. Shift registers can be used as simple delay circuits. Several bidirectional shift registers could also be connected in parallel for a hardware implementation of a stack.
Similarly, PISO configurations are commonly used to add more binary inputs to a microprocessor than are available - each binary input i. Shift registers can also be used as pulse extenders. Compared to monostable multivibrators, the timing has no dependency on component values, however, it requires external clock and the timing accuracy is limited by a granularity of this clock. Ronja Twister , where five shift registers create the core of the timing logic this way schematic. In early computers, shift registers were used to handle data processing: Many computer languages include instructions to 'shift right' and 'shift left' the data in a register, effectively dividing by two or multiplying by two for each place shifted.
Very large serial-in serial-out shift registers thousands of bits in size were used in a similar manner to the earlier delay line memory in some devices built in the early s. Such memories were sometimes called circulating memory. For example, the Datapoint terminal stored its display of 25 rows of 72 columns of upper-case characters using fifty-four bit shift registers, arranged in six tracks of nine packs each, providing storage for six-bit characters.
The shift register design meant that scrolling the terminal display could be accomplished by simply pausing the display output to skip one line of characters.